Accession Number : ADD017277

Title :   Method for Fabricating Vertical Bipolar Junction Transistors in Silicon Bonded to an Insulator.

Descriptive Note : Patent, Filed 25 Apr 94, Patented 8 Nov 94,

Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s) : Cartagena, Eric N

Report Date : 08 Nov 1994

Pagination or Media Count : 14

Abstract : A method is provided for manufacturing a bipolar transistor, comprising the steps of: (1) abutting a polished surface of a substantially single crystal silicon waler with a polished surface of an insulating substrate: (2) heating the abutting silicon water and insulating substrate at about 200 deg C. for about 30 minutes to form a bonded wafer having a silicon layer; (3) forming a silicon island from the silicon layer; (4) ion implanting a first dopant species having a first conductivity into the silicon island to form a base region in the silicon island; (5) ion implanting a second dopant species having a second conductivity opposite the first conductivity into the silicon island to form an emitter region and a collector region in the silicon island; (6) ion implanting a third dopant species having the first conductivity into the base region of the silicon island; (7) heating the bonded wafer at a temperature of about 800 deg C. to activate the first, second and third dopant species and to repair ion implanting damage to the silicon island; (8) forming electrical contacts to the base, emitter, and collector regions; and (9) forming an oxide layer over the electrical contacts to passivate the electrical contacts.

Descriptors :   *FABRICATION, *BIPOLAR TRANSISTORS, *PATENTS, IONS, LAYERS, INSULATION, SINGLE CRYSTALS, SUBSTRATES, ELECTRICAL CONDUCTIVITY, REGIONS, REPAIR, VERTICAL ORIENTATION, OXIDES, SILICON, BONDED JOINTS, WAFERS, EMITTERS, IMPLANTATION, ELECTRIC CONTACTS, JUNCTION TRANSISTORS

Subject Categories : Electrical and Electronic Equipment

Distribution Statement : APPROVED FOR PUBLIC RELEASE