Accession Number : ADD017305
Title : Dynamic Random Access Memory Device.
Descriptive Note : Patent, Filed 16 Jun 92, patented 15 Nov 94,
Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC
Personal Author(s) : Cooper, James A , Jr ; Melloch, Michael R ; Stellwag, Theresa B
Report Date : 15 Nov 1994
Pagination or Media Count : 12
Abstract : A vertically integrated DRAM cell having a storage time of at least 4.5 hours at room temperature, formed from a wide-bandgap semiconductor such as GaAs or AlGaAs, in which an n-p-n bipolar access transistor is merged with a p-n-p storage capacitor, with the middle p-n layers being common to both. Similarly, a p-n-p transistor can be merged with an n-p-n storage capacitor.
Descriptors : *RANDOM ACCESS COMPUTER STORAGE, *PATENTS, LAYERS, GALLIUM ARSENIDES, ALUMINUM GALLIUM ARSENIDES, ROOM TEMPERATURE, N TYPE SEMICONDUCTORS, STORAGE, BIPOLAR TRANSISTORS, P TYPE SEMICONDUCTORS
Subject Categories : Electrical and Electronic Equipment
Distribution Statement : APPROVED FOR PUBLIC RELEASE