
Accession Number : ADD017734
Title : Method and Apparatus for PreProcessing Inputs to Parallel Architecture Computers.
Descriptive Note : Patent, Filed 21 Oct 92, patented 29 Aug 95,
Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC
Personal Author(s) : Kevorkian, Aram K
Report Date : 29 Aug 1995
Pagination or Media Count : 63
Abstract : A preprocessing method and preprocessor decom posed a first problem belonging to a class of linear algebra problems comprising an input sparse symmetric matrix into a suite of subproblems. The preprocessor generates a suite of signals representing the information content of a permutation of the rows and columns of fire sparse symmetric matrix. These signals are used to define a blockbordered blockdiagonal form leading to a Schurcomplement resolution wherein each subproblem corresponds to a perfect parallelism in the first problem. The preprocessor allocates the subproblems to subprocessors in a network of parallel architecture computers. The subprocessors solve the subproblems concurrently and combine the results in a frontend computer, which outputs a solution to the first problem. A preprocessing method and preprocessor decomposed a first problem belonging to a class of linear algebra problems comprising an input sparse symmetric matrix into a suite of subproblems. The proprocessor generates a suite of signals representing the information content of a permutation of the rows and columns of fire sparse symmetric matrix. These signals are used to define a blockbordered blockdiagonal form leading to a Schurcomplement resolution wherein each subproblem corresponds to a perfect parallelism in the first problem. The preprocessor allocates the subproblems to subprocessors in a network of parallel architecture computers. The subprocessors solve the subproblems concurrently and combine the results in a frontend computer, which outputs a solution to the first problem.
Descriptors : *COMPUTER ARCHITECTURE, *PARALLEL PROCESSORS, *PREPROCESSING, *PATENTS, INPUT, COMPUTERS, ALGEBRA, INPUT OUTPUT PROCESSING, PARALLEL PROCESSING, PROBLEM SOLVING, SYMMETRY, SPARSE MATRIX, PERMUTATIONS
Subject Categories : Computer Hardware
Distribution Statement : APPROVED FOR PUBLIC RELEASE