Accession Number : ADD017734

Title :   Method and Apparatus for Pre-Processing Inputs to Parallel Architecture Computers.

Descriptive Note : Patent, Filed 21 Oct 92, patented 29 Aug 95,

Corporate Author : DEPARTMENT OF THE NAVY WASHINGTON DC

Personal Author(s) : Kevorkian, Aram K

Report Date : 29 Aug 1995

Pagination or Media Count : 63

Abstract : A pre-processing method and pre-processor decom- posed a first problem belonging to a class of linear algebra problems comprising an input sparse symmetric matrix into a suite of sub-problems. The preprocessor generates a suite of signals representing the information content of a permutation of the rows and columns of fire sparse symmetric matrix. These signals are used to define a block-bordered block-diagonal form leading to a Schur-complement resolution wherein each sub-problem corresponds to a perfect parallelism in the first problem. The preprocessor allocates the sub-problems to sub-processors in a network of parallel architecture computers. The sub-processors solve the sub-problems concurrently and combine the results in a front-end computer, which outputs a solution to the first problem. A pre-processing method and pre-processor decomposed a first problem belonging to a class of linear algebra problems comprising an input sparse symmetric matrix into a suite of sub-problems. The pro-processor generates a suite of signals representing the information content of a permutation of the rows and columns of fire sparse symmetric matrix. These signals are used to define a block-bordered block-diagonal form leading to a Schur-complement resolution wherein each sub-problem corresponds to a perfect parallelism in the first problem. The preprocessor allocates the sub-problems to sub-processors in a network of parallel architecture computers. The sub-processors solve the sub-problems concurrently and combine the results in a front-end computer, which outputs a solution to the first problem.

Descriptors :   *COMPUTER ARCHITECTURE, *PARALLEL PROCESSORS, *PREPROCESSING, *PATENTS, INPUT, COMPUTERS, ALGEBRA, INPUT OUTPUT PROCESSING, PARALLEL PROCESSING, PROBLEM SOLVING, SYMMETRY, SPARSE MATRIX, PERMUTATIONS

Subject Categories : Computer Hardware

Distribution Statement : APPROVED FOR PUBLIC RELEASE