Accession Number : ADP002333

Title :   Micropower CMOS Implementation of Three-Valued Logic Functions,

Corporate Author : OITA UNIV (JAPAN) FACULTY OF ENGINEERING

Personal Author(s) : Muta,S.

Report Date : MAY 1983

Pagination or Media Count : 3

Abstract : A method for implementing ternary logic functions with CMOS integrated circuits is proposed. This method has the significant advantage of very low static power consumption at any of three logic levels comparable to that of binary CMOS circuits, and also it needs no modification in the fabricating process of the present CMOS technology. (Author)

Descriptors :   *Integrated circuits, *Logic circuits, *Decoding, *Coding, *Symposia, *Complementary metal oxide semiconductors, Low power, Logic, Foreign technology, Circuits, Japan

Distribution Statement : APPROVED FOR PUBLIC RELEASE