Accession Number : ADP002379

Title :   Synthesis Algorithm for Minimal Components in T-ULM (Universal Logic Modules) Networks,

Corporate Author : WEST VIRGINIA UNIV MORGANTOWN DEPT OF ELECTRICAL ENGINEERING

Personal Author(s) : Klinkhachorn,P. ; Swartwout,R.

Report Date : MAY 1983

Pagination or Media Count : 6

Abstract : An algorithm has been developed and programmed in Pascal to design T-ULM networks for MVL systems with up to 6 r-valued inputs (r from 2 to 5). The algorithm is based on a special form of T-ULM formed from threshold detectors and switches. The objective of the algorithm is to minimize the total number of components (thresholds and switches) and also the total number of T-ULM's. Techniques are presented that make optimal use of don't care conditions in the functional specification. (Author)

Descriptors :   *Networks, *Logic devices, *Gates(Circuits), *Logic circuits, *Mathematical logic, *Symposia, Algorithms, Detectors, Modules(Electronics), Threshold effects, Switching circuits, Binary notation, Parts

Distribution Statement : APPROVED FOR PUBLIC RELEASE