Accession Number : ADP002613

Title :   Signal Processing in High Data Rate Environments--Design Tradeoffs in the Exploitation of Parallel Architectures and Fast System Clock Rates: An Overview,


Personal Author(s) : Gilbert,B. K. ; Kinter,T. M. ; Schwab,D. J. ; Naused,B. A. ; Krueger,L. M.

Report Date : 1983

Pagination or Media Count : 7

Abstract : This conference is exploring the methods by which the emerging very large scale integration (VLSI) technology, i.e., the ability to place more than 10,000 logic gates on a single integrated circuit, can be exploited for the solution of difficult signal processing problems. The following discussion will concentrate on a highly specialized subset of the total signal processing environment, i.e., that small minority of such problems in which a single unprocessed data stream appears at the input of a digital processor in real time and at very high data bandwidths. These high volume data streams must be processed by the front end of the signal processor at clock rates equal to or greater than the rates at which they are delivered; in later stages of processing, it may be possible to partition the single high-speed data stream into a series of lower speed substreams and to institute parallel processing on the substreams. We have been compelled to consider potential solutions to these high data rate problems, and to compare these problems with the capabilities of silicon VLSI, as well as other technologies, with which they may be addressed.

Descriptors :   *Gates(Circuits), *Integrated circuits, *Signal processing, Gallium arsenides, Architecture, Data rate, High rate, Data processing, Parallel processing

Distribution Statement : APPROVED FOR PUBLIC RELEASE