Accession Number : ADP002841

Title :   Operational Readiness and Its Impact on Fighter Avionic System Design,


Personal Author(s) : Irwin,J. F.

Report Date : OCT 1983

Pagination or Media Count : 12

Abstract : Achievement of Operational Readiness(OR) requires an interaction with the functional design and must be built into the system and controlled from the top down. The payoff is obtained in terms of enhanced mission success, improved availability/reliability, and reductions in maintenance and life cycle costs. Testability in microprocessors must start at the level of the chip design. Many techniques such as nodal summing points, redundancy switching and dynamic macrotest software are known today and can be easily incorporated at the outset of the processor design, using automated design aids. Cost reduction goals can be realized with the elimination of the intermediate level test system and a reduction in the cost of the depot/factory equipment. Life cycle costs can be drastically lowered by the reduction in maintenance training and support costs. New electronic components will permit the inclusion of advanced testability concepts into airborne avionics. Advances in software and design of new distributed-system architectures will provide for a universal set of testing standards. Achievement of (OR) concepts will be obtained through integration and control of each of its related elements, thus providing a marked increase in weapon systems effectiveness. The deployment of weapon systems which have been designed to comply with (OR) requirements hold significant promise of improved availability while reducing life cycle cost and manpower requirements.

Descriptors :   *Avionics, Operational readiness, Military requirements, Jet fighters, Systems approach, Architecture, Test methods, Test equipment, Automatic, Microprocessors, Distributed data processing, Integrated circuits, Fault tolerant computing, Integrated systems

Distribution Statement : APPROVED FOR PUBLIC RELEASE