Accession Number : ADP003932
Title : Depot Level Problems in the Testing of Printed Circuit Boards,
Corporate Author : AIR FORCE INST OF TECH WRIGHT-PATTERSON AFB OH
Personal Author(s) : Milne,R.
Report Date : JUN 1984
Pagination or Media Count : 6
Abstract : The Air Force today has a severe problem in the automatic testing of analog cards. Most automated test programs run a structured series of tests requiring many hours. Even after several hours of testing, the program has reduced the fault to as many as 10 potential components. In most cases, it is not possible to reorder the tests. As a result, there is no way to indicate to the system that the last test is the one which is most likely to identify the fault. At the Air Force Institute of Technology, we are working with Warner-Robins Air Logistics Center(WRALC) to develop an expert system for the diagnosis of faults in analog circuit cards. WRALC has a large depot of Automated Test Equipment which runs virtually 24 hours a day, 7 days a week. Their problems include inflexible programs which proceed in sequence even if it is believed the failure to be located would be found by one of the last tests to be run. Some of these programs take 3 1/2 hours to run.
Descriptors : *Test equipment, *Test methods, *Printed circuit boards, Automatic, Heuristic methods, Schematic diagrams, Faults, Diagnosis(General)
Distribution Statement : APPROVED FOR PUBLIC RELEASE