Accession Number : ADP008625
Title : Fault-Tolerant Computing on POEM,
Corporate Author : CALIFORNIA UNIV SAN DIEGO LA JOLLA DEPT OF ELECTRICAL AND COMPUTER ENGINEERIN G
Personal Author(s) : Lu, Dau-Tsuong ; Lin, Ting-Ting Y. ; Kiamilev, Fouad E. ; Esener, Sadik C. ; Lee, Sing H.
Report Date : 22 MAY 1992
Pagination or Media Count : 4
Abstract : Wafer scale integration (WSI) promises to realize a complete multiprocessing system on the same wafer and eliminates the expensive steps required to dice and bond. The fundamental belief is that the internal connection between chips on the same wafer are more reliable and have a smaller propagation delay than external connections. However, achieving a high yield has proven to be a major challenge. Rather than aiming for 100% yield, the realistic solution is to determine the defective components on the wafer and replace them with spares. Which means, the design should be tolerant to faults developed during the manufacturing process. Moreover, faults occur during system operation, be it component failure, improper operation, or environmental factors. Therefore, a mena to detect these unexpected faults and recover from them is necessary to minimize down time and unavailability. Long and periodic system downs are a luxury that cannot be afforded for computers used in critical applications. In this paper, we show that the introduction of optical interconnection techniques into a multiprocessor environment (e.g. the Programmable Optoelectronic Multiprocessor, POEM) enables efficient implementation of fault-tolerant techniques.
Descriptors : *FAULT TOLERANT COMPUTING, *ELECTROOPTICS, MULTIPROCESSORS, OPTICAL PROCESSING, WAFERS, CHIPS(ELECTRONICS), HOLOGRAPHY.
Subject Categories : Computer Programming and Software
Electrooptical and Optoelectronic Devices
Distribution Statement : APPROVED FOR PUBLIC RELEASE